In the whole arithmetic integrated digital circuit design, 4-bit absolute-value detector act as an indispensable part throughout the period. Conventionally, the research usually implements the circuit based on the requirement and logic expressions. However, it is also necessary to evaluate the designed circuit with two obvious standards: delay and power consumption. In that case, a specific assessment includes logic effort calculation and gate sizing approach should be taken into serious account to balance these two factors and figure out the optimal way of the circuit design. This paper provi...
